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5.12. Ethernet  
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The ? Ethernet ? subsystem ? of ? the ? Quick ? Start ? board ? is ? provided ? by ? the ? SMSC ? LAN8720 ? Ethernet ? Transceiver ?
(U17). ? The ? Ethernet ? Transceiver ? (or ? PHY) ? receives ? standard ? RMII ? Ethernet ? signals ? from ? the ? Fast ? Ethernet ?
Controller ? (FEC) ? of ? the ? i.MX53 ? Applications ? Processor. ? The ? Processor ? takes ? care ? of ? all ? Ethernet ? protocols ?
at ? the ? MAC ? layer ? and ? above. ? The ? PHY ? is ? responsible ? only ? for ? the ? Link ? Layer ? formatting. ? The ? PHY ? receives ?
a ? 50MHz ? clock ? signal ? from ? the ? oscillator ? X1. ? On ? initial ? versions ? of ? the ? i.MX53 ? silicon, ? this ? clock ? signal ? was ?
shared ? with ? the ? SATA ? module ? of ? the ? i.MX53 ? Processor. ? On ? current ? versions ? of ? the ? Quick ? Start ? board, ? the ?
50 ? MHz ? clock ? signal ? is ? only ? used ? to ? support ? the ? Ethernet ? subsystem. ??
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The ? two ? control ? traces ? from ? the ? i.MX53 ? Processor ? to ? the ? Ethernet ? PHY ? are ? and ? Active ? low ? Interrupt ? trace ?
(FEC_nINT) ? and ? an ? Active ? Low ? reset ? line ? (FEC_nRST). ? When ? the ? PHY ? comes ? out ? of ? reset, ? it ? is ? internally ?
programmed ? to ? establish ? communications ? with ? an ? attached ? Ethernet ? device ? and ? be ? ready ? to ? correctly ?
format ? all ? communications, ? whether ? they ? are ? being ? transmitted ? or ? received ? by ? the ? processor. ? If ?
communications ? become ? unreliable, ? the ? processor ? can ? restart ? the ? PHY ? by ? forcing ? it ? into ? reset ? and ?
allowing ? the ? PHY ? come ? back ? out ? of ? reset ? normally. ?
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The ? PHY ? is ? connected ? directly ? to ? the ? integrated ? magnetics ? of ? the ? Ethernet/Dual ? USB ? connector ? (J2), ? with ?
two ? pairs ? of ? differential ? traces ? for ? receive ? and ? transmit, ? and ? connections ? to ? the ? indicator ? LEDs. ? The ?
differential ? pair ? traces ? are ? biased ? externally ? with ? 49.9 ? 1% ? Ohm ? pull ‐ up ? resistors. ? The ? magnetics ? included ?
in ? the ? Ethernet ? connector ? were ? chosen ? to ? enable ? the ? auto ‐ negotiation ? feature ? of ? the ? PHY ? to ? work ?
correctly. ? When ? initially ? connected ? to ? another ? Ethernet ? device, ? the ? PHY ? will ? negotiate ? to ? determine ? if ? it ?
connected ? to ? a ? switch ? type ? device ? or ? another ? Ethernet ? end ? device, ? and ? will ? reconfigure ? the ? Transmit ? and ?
Receive ? inputs ? to ? correctly ? match ? the ? device ? attached. ? This ? eliminates ? the ? need ? for ? cross ‐ over ? cables ?
when ? directly ? connecting ? to ? another ? Ethernet ? end ? device. ??
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The ? LED ? status ? indicators ? are ? driven ? by ? the ? PHY ? to ? show ? a ? connected ? link ? and ? activity ? on ? the ? link. ? It ? is ?
important ? to ? note ? that ? the ? LED ? control ? lines ? from ? the ? PHY ? also ? serve ? as ? PHY ? feature ? selection ? options. ? At ?
boot ? time, ? the ? LED1 ? control ? pin ? serves ? to ? determine ? whether ? the ? 1.2V ? internal ? regulator ? should ? be ?
turned ? on ? or ? off, ? and ? the ? LED2 ? control ? pins ? determines ? whether ? the ? PHY ? accepts ? an ? external ? reference ?
clock ? or ? internally ? generates ? the ? clock ? signal ? and ? outputs ? it ? to ? the ? processor ? for ? reference. ? See ? the ?
LAN8720 ? datasheet ? for ? further ? details. ?
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If ? a ? board ? designer ? wishes ? to ? reduce ? costs ? in ? the ? implementation ? of ? Ethernet, ? it ? is ? possible ? to ? replace ? the ?
oscillator ? with ? a ? lower ? cost ? 50 ? MHz ? crystal. ? The ? LAN8720 ? has ? more ? information ? on ? this ? implementation. ?
The ? oscillator ? was ? originally ? designed ? to ? support ? two ? different ? subsystems ? on ? the ? board, ? and ? is ? no ?
longer ? an ? necessary ? expense. ?
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Freescale Semiconductor
Hardware User Guide for i.MX53 Quick Start Board,
Preliminary Rev 0.91
58
PUBI – Public Use Business Information ?
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